1. Field of Invention
The present invention relates to a process for fabricating an integrated circuit More particularly, the present invention relates to a process for fabricating a mixed signal integrated circuit.
2. Description of Related Art
FIGS. 1A-1F are schematic, cross-sectional views of a conventional process for fabricating a mixed signal integrated circuit.
As shown in FIG. 1A, a substrate 100 is provided, wherein the substrate 100 is covered with an oxide layer 102 and a field oxide layer 104.
As shown in FIG. 1B, a first implantation step 106 is performed to adjust threshold voltage by using the oxide layer 102 (shown in FIG. 1A) as a sacrificial layer. The oxide layer 102 is often damaged in this implantation 106, and the damaged oxide layer is represented by reference number 102a.
As shown in FIG. 1C, a polysilicon layer 108 is formed to cover the field oxide layer 104 and the oxide layer 102a.
As shown in FIG. 1D, a second implantation step 110 is performed, so that the polysilicon layer 108 has impurities to increase the conductivity. Beneath the polysilicon layer 108, the oxide layer 102a (shown in FIG. 1C) is often further damaged to form weak points (not shown) during this second implantation step 110. The oxide layer with the weak points is represented by reference number 102b. One of the reasons why the damages occur is that the accelerated impurities cause an implant charging effect on the oxide layer 102a. After the second implantation step 110, an annealing step is performed.
As shown in FIG. 1E, the polysilicon layer 108 (shown in FIG. 1D) is patterned by a photolithography-etching method to form a bottom polysilicon plate 108a over the field oxide layer 104. In this patterning step, the oxide layer 102b (shown in FIG. 1D) is used as an etching stop layer. However, the etching stop layer cannot prevent the substrate 100 and the oxide layer 102b (shown in FIG. 1D) from being etched. The etching source often etches through the weak points of the oxide layer 102b and into the substrate 100 to form pits 112. After this patterning step, the oxide layer is represented by reference number 102c.
As shown in FIG. 1F, the oxide layer 102c (shown in FIG. 1E) is removed. After the oxide layer 102c is removed, a gate oxide layer (not shown) is grown on the substrate 100. The gate oxide layer is grown with poor quality, because the substrate 100 has the pits 112 thereon. Due to the poor quality, the gate oxide layer decreases the induced breakdown voltage, and therefore decreases the yield of the mixed signal integrated circuit. Other steps for fabricating the mixed signal integrated circuit are easily accomplished by persons skilled in the art and are thus omitted here.